Physical Design Engineer
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- Setting up library and PDK environment for projects
- Chip level and block level Floor planning and IO placement
- Place-and-Route using industry-standard toolsBuild Clock Tree as per requirement
- Achieve clean routing
- RC Extraction
- Static Timing Analysis in multi-mode multi-corner
- Physical Verification (LVS/DRC/ERC) using industry-standard tools
- Power/IR analysis
- Logical Equivalence Check
- Synthesis
- Develop tcl/shell/perl/python scripts to automate various processes of the Physical Design Flow
- Working protocol blocks like PCIe, NVMe, USB4.0, DDR, AXI, CHI, AHB, MIPI, Display port, Ethernet.
- BE/ BTech/ MTech/MS/ PhD in Electronics, Electrical, Computer Engineering, or Computer Science Engineering
- 3-8 years of experience
- Highly motivated and driven to face the challenging design problems
- Be able to communicate with system architects and decipher system requirements and develop architectural specification of the SoC
- Complete sign-off GDSII working with RTL and DFT engineering teams.
- Be able to comprehend usual service level agreement features – Performance, Area and Customer Schedule, and accordingly plan the development.
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