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Physical Structural Design Engineer (Place and Route)

RM 5,000 - RM 5,000 / Per Mon

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At least 3 Year(s) of working experience in the related field is required for this position.

Hands-on in Physical Design Implementation using Synopsys Tools (ICC/ICC2) or equivalent

Hands-on Experience in closure of Physical Verification requirements - DRC/ANT/LVS

Good understanding of STA requirements

Comfortable in one or more scripting languages like Perl/Unix/Tcl

Verilog RTL coding with good logic design background is desirable but not required.

Candidate must possess at least Bachelor’s Degree/Post Graduate Diploma/Professional Degree in Engineering (Electrical/Electronic) or equivalent.

Test and Validation Engineer

Job Description:

Collecting and analyzing silicon test results, and creating test reports for validation, characterization and qualification Memory products.

Investigate functional and reliability issues; drive silicon performance issues, and complete failure analysis to determine root causes.

Carryout burn-in and qualification of packaged units.

Develop scripts to automate work flows and perform statistical analysis on test data; create graphs, performance/reliability models, and silicon test reports.

Qualifications

At least 3 Year(s) of working experience in the related field is required for this position.

Experienced in HP/Verigy/Advantest 93K and other similar test equipment.

Knowledgeable in Verilog, System Verilog, simulation and test benches, Memory test algorithms,

Useful experience: Memory BIST testing; Scan and ATPG tools

Candidate must possess at least Bachelor’s Degree/Post Graduate Diploma/Professional Degree in Engineering (Electrical/Electronic) or equivalent.

Job Type: Full-time

Pay: Up to RM5,000.00 per month

Benefits:

  • Dental insurance
  • Flexible schedule
  • Health insurance
  • Vision insurance

Schedule:

  • Day shift
  • Monday to Friday