Pre- Silicon Design Verification Engineer

Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation. Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure. Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification. Own and implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology. Work independently on various DV tasks and providing technical guidance to the DV team, or even lead a big DV task inside team or cross team.