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Jobs or company...
A

Junior/Senior/Staff FEINT Design Engineer [Based in Jelutong,Penang]

  • Full Time, onsite
  • Agensi Pekerjaan Terra Staffing Solutions Sdn Bhd
  • Jelutong, Malaysia
RM 6,000 - RM 30,000 / month
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Position: Junior/Senior/Staff FEINT Design Engineer

No. of Headcounts : 1 headcount

Work Location: Jelutong, Penang

*This is a permanent position that is open to Malaysians citizens or PR holders only

Job Summary: Our Client is a very large international integrated circuit technology company providing IP/SOC solutions, system customization design solutions, and design services to customers worldwide.They are in the semiconductor industry and have an international presence. They have established long-term partnerships with top semiconductor design companies and suppliers such as but not limited to - Broadcom, QUALCOMM, AMD, Marvell, ADI, GF as well as leading edge of the semiconductor companies such as SYNOPSYS, ALchip, China technology and so on,etc , delivering cutting-edge projects and processes from -40nm to 3nm nodes.They have expanded into Penang, Malaysia with HQ in China and having branches in USA and other countries, etc.

As a Junior/Senior/ Staff FEINT Design Engineer, you will play a pivotal role in the Design Feint in process of IP, contributing to all stages from testbench development to regression debugging. Your responsibilities will include developing test plans, implementing verification methodologies, and enhancing efficiency through script creation. This position requires strong self-drive, excellent communication skills, and adept problem-solving abilities.

KEY ROLE & RESPONSIBILITIES

  • Responsible for Front-End chip implementation including design, implementation and execution of the flow that starts with RTL code and ends with the delivery of a netlist package ready for physical design.
  • Responsible for ASIC design methodology and flow development, interfacing with EDA vendors on technology.
  • Responsible for cdc/lint, timing closure, lower power implementation and netlist quality check with RTL designer and PD team.

Required Qualifications:

· Bachelor’s Degree/ Masters or PHD in Electrical & Electronics Engineering or a related field.

· With a minimum of 3 years relevant experience with a Bachelor's degree or a minimum of 2 years and above with a Master's degree.

· Required candidates who are fluent in both spoken & written in English language

· Candidates who are proficient in spoken Mandarin language are highly preferred but is an added advantage

· Experience with Verilog RTL design/implementation and has experience of large digital ASIC project.

· Experience with front-end EDA tools and flows (Design compiler, PrimeTime, Conformal, VSI/VC-static, Formality, etc…)

· Experience with unix/linux and scripts (tcl, perl, etc.)

· Experience with physical design is an added advantage

· Has Synthesis or physical implement experience.

· Experience with lower power design methodology.

Work Arrangements

Location: Fully office based/onsite in Jelutong,Penang.

· Working Hours:

· Monday to Friday: 9:00 AM – 6:00 PM

Job Benefits

· Any allowance & benefits can be further discussed upon offer as our client is open for discuss for the overall compensation package when it comes to the offer stage

· Opportunity for career growth and advancement

Salary Range

RM6,000 to RM30,000 per month - commensurate with years of experience & qualifications

Entry-Level (0-2 years of experience):
Minimum: RM 6,000
Maximum: RM 9,000

Mid-Level (3-5 years of experience)-
Minimum: RM 8,000
Maximum: RM 12,000

Senior-Level (6+ years of experience)-

Minimum: RM 10,000
Maximum: RM15,000 to RM30,000

How to Apply:
If you believe you have the right experience and skills to excel in this role and are passionate in making an impact in the Semiconductor industry, we would love to hear from you!

Please send your latest updated CV or Resume to [email protected]

Additional Application Instructions-

  • Recent passport-sized photograph is mandatory
  • Attach all relevant academic certificates, professional qualifications, and transcripts to your application

TERRA ASIA GROUP's website: https://www.terra.my

Job Type: Permanent

Pay: RM6,000.00 - RM30,000.00 per month

Schedule:

  • Day shift
  • Monday to Friday

Ability to commute/relocate:

  • Jelutong: Reliably commute or planning to relocate before starting work (Preferred)

Application Question(s):

  • Regarding your notice period - Are you able start immediately? IF Not - How long is your notice period? How many annual leave balances do you have left? (to reduce your notice period?)
  • What is your expected negotiable salary amount/range for this position?
  • What is your last drawn salary amount?
  • Do you have experience with Verilog RTL design/implementation and also have experience of large digital ASIC project?
  • Do you have experience with front-end EDA tools and flows (Design compiler, PrimeTime, Conformal, VSI/VC-static, Formality, etc…)
  • Do you have experience with unix/linux and scripts (tcl, perl, etc.)?
  • Do you have experience with physical design? - This is an added advantage
  • Do you have experience in/with Synthesis or physical implementation?