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Jobs or company...
A

Junior/Senior/Staff Design Verification Engineer (Silicon Design)[Based in Jelutong,Penang]

  • Full Time, onsite
  • Agensi Pekerjaan Terra Staffing Solutions Sdn Bhd
  • Jelutong, Malaysia
RM 6,000 - RM 30,000 / month
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Position: Junior/Senior/Staff Design Verification Engineer (Silicon Design)

No. of Headcounts : 3 headcounts

Work Location: Jelutong, Penang

*This is a permanent position that is open to Malaysians citizens or PR holders only

Job Summary: Our Client is a very large international integrated circuit technology company providing IP/SOC solutions, system customization design solutions, and design services to customers worldwide.They are in the semiconductor industry and have an international presence. They have established long-term partnerships with top semiconductor design companies and suppliers such as but not limited to - Broadcom, QUALCOMM, AMD, Marvell, ADI, GF as well as leading edge of the semiconductor companies such as SYNOPSYS, ALchip, China technology and so on,etc , delivering cutting-edge projects and processes from -40nm to 3nm nodes.

As a Senior Design Verification Engineer (Silicon Design), you will play a pivotal role in the verification process of IP, contributing to all stages from testbench development to regression debugging. Your responsibilities will include developing test plans, implementing verification methodologies, and enhancing efficiency through script creation. This position requires strong self-drive, excellent communication skills, and adept problem-solving abilities.

KEY ROLE & RESPONSIBILITIES

· Develop and verify new features for IP.

· Build testbenches and create comprehensive test plans.

· Debug regressions and ensure the integrity of verification processes.

· Apply advanced verification methodologies (e.g., UVM, coverage, ASIC design, assertion, randomization) to meet verification goals.

· Develop scripts to streamline verification processes and enhance efficiency.

Required Qualifications:

· Proficiency in design for verification techniques, including assertion-based design strategies, code coverage, and functional coverage.

· Familiarity with PCIE, other IP, or SOC DV.

· Experience with SystemVerilog (SV) and Universal Verification Methodology (UVM).

· Familiar with Linux.

· Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field.

· With more than 3 years relevant experience with a Bachelor's degree or more than 2 years with a Master's degree.

· Required candidates who are fluently i n both written & spoken english language.
· Familiar with PCI Express (PCIE)

· Familiar with SystemVerilog(SV) OR Universal Verification Methodology (UVM)

· Familiar with Linux

· Experience with design for verification (assertion-based design strategies, code coverage, functional coverage, test plan,etc)

Working Hours: Monday to Friday 9AM – 6PM (Flexible working Hours/style)

· Any allowance & benefits can be further discussed upon offer as our client is open for discuss for the overall compensation package when it comes to the offer stage

· Opportunity for career growth and advancement

Entry-Level (0-2 years of experience):
Minimum: RM 6,000
Maximum: RM 9,000

Mid-Level (3-5 years of experience)-
Minimum: RM 8,000
Maximum: RM 12,000

Senior-Level (6+ years of experience)-

Minimum: RM 10,000
Maximum: RM15,000 to RM30,000

How to Apply:
If you believe you have the right experience and skills to excel in this role and are passionate in making an impact in the Semiconductor industry, we would love to hear from you!

Please send your latest updated CV or Resume to [email protected]

Additional Application Instructions-

  • Recent passport-sized photograph is mandatory
  • Attach all relevant academic certificates, professional qualifications, and transcripts to your application

TERRA ASIA GROUP's website: https://www.terra.my

Job Type: Permanent

Pay: RM6,000.00 - RM30,000.00 per month

Schedule:

  • Day shift
  • Monday to Friday

Ability to commute/relocate:

  • Jelutong: Reliably commute or planning to relocate before starting work (Preferred)

Application Question(s):

  • Regarding your notice period - Are you able start immediately? IF Not - How long is your notice period? How many annual leave balances do you have left? (to reduce your notice period?)
  • What is your expected negotiable salary amount/range for this position?
  • What is your last drawn salary amount?
  • Are you proficient with PCI Express (PCIE)?
  • Are you proficient with SystemVerilog(SV) OR Universal Verification Methodology (UVM)?
  • Are you proficient with Linux?
  • Are you proficient with experience with design for verification? (Assertion-based design strategies, code coverage,functional coverage, test plan,etc)