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Software Enabling and Optimization Engineer
Salary undisclosed
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-Develop designs for next generation protocol and interconnect IPs, including PCIe Gen 3/4/5, CXL, DDR4, DDR5, LPDDR5, and HBM memory -Participate in interoperability testing and compliance for protocol IP use cases and demonstrate performance to customers -Create collateral including protocol IP user guides, reference designs, technology demonstrations, tools, and macros -Collaborate with cross functional teams for issue resolution and protocol validation, and provide feedback to engineering on protocol IP quality and customer experience. Qualification: -Bachelor’s degree in Electrical Engineering, Computer Engineering, or related STEM field (documentation related to bachelor's degree completion will be required). -Advanced English. -6+ months of experience in FPGA design and debug