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Analog Circuit Design Engineer
Salary undisclosed
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As an Analog Circuit Design Engineer you will be part of a team designing various analog/mixed-signal circuit designs on Intel FPGAs such as Phase lock loops (PLLs), Delay locked loops (DLLs) and other clocking circuits, regulators and bandgaps, Analog to digital converter (ADC), IO circuits such as high voltage IO, RCOMP/SCOMP, die-to-die IO solution such as AIB/UCIe, HBM, etc. on advanced processes nodes and have an opportunity to work on a diverse set of blocks and tasks in all phases of the design. The ideal candidate will be an independent self-starter who can own/design an analog IP and deliver all aspects of the design and collateral, a motivated team-player who is able to work with cross-functional and cross-geo teams to understand, articulate and solve problems, and an excellent communicator who is able to represent the team in meetings and forums. Interest in mentoring and potentially managing a small group of analog designers in the future is a plus. -Technical path-finding, innovation and design of analog/mixed-signal circuits to meet architectural requirements. Own specification documentation and circuit architecture for the block. -Design and deliver circuit schematics, perform pre-layout and post-layout design optimization to meet design specification across PVT, process variation sensitivity analysis, aging, EOS, RV checks for design reliability. Define and execute on design verification plans covering functionality, performance and reliability meeting high volume productization requirement. -Work with custom layout team to define plan (floorplan, routing, matching, metal grid etc) to meet circuit performance -Collateral generation like Integration spec, BMOD, UPF, PERC, timing model, power model, RV, ICCT, IBIS, alpha numbers. -Collaborate with logic designer, logic verification designer, structural physical design engineers, signal integrity and power deliver engineer to define clear collateral handoff requirements to ensure quality IP integration. -Perform post silicon data analysis and debug and make necessary design enhancement to meet design specification. -Conduct design reviews; actively contribute to design reviews in the team -Represent the team on related IP in cross-functional meetings and co-ordination of deliverables Qualification: -BSEE/MSEE/PhD in Electrical Engineering or equivalent with a minimum of 12 years of experience in analog/mixed signal design or high speed IO/high voltage IO designs including transmitter, receiver and voltage regulator. -Direct design experience with analog and mixed signal circuits like amplifiers, comparators, regulators, IO, PLL etc -Nice to have design experience of high speed analog and mixed-signal design, architecture, system and integration aspects for AIB/UCIe, HBM PHYs, DDR/LPDDR/MIPI interfaces as well as LVDS/GPIO designs. -Solid understanding of analog design trade-offs and design for process variation and reliability in modern CMOS technologies -Hands on experience with analog simulation and reliability tools and flows -Understanding of Verilog, static timing analysis, UPF and related aspects of mixed signal design -Good communication and presentation skills to enable cross functional collaboration - Effective prioritization and planning, time management skills -Be willing to work in a dynamically changing, cross geo environment which requires ingenuity and skills to solve issues -Team player - Be willing to work autonomously, and also collaboratively in a team environment