FPGA IP Software Development Engineer

As the FPGA IP Software Development Engineer, you get to explore and define the complex IP features for implementation feasibility by working with the stakeholders from both hardware and software domains. Responsibilities: • Perform design trade-off to achieve the optimal modularity, scalability and fabric PPU (power, performance and utilization). • Review the IP requirements and come up the design implementation strategy for the IP. • Implement logic design in Register Transfer Level (RTL) code, carry out logic simulation and apply corrective measures for simulation failures. • Analyze and use lint results to improve design sign-off. • Design review and peer review for quality purpose. • Work closely with the design verification team in determining the proper validation strategy for the IP, and defining and providing feedback on the hardware validation plans. • Work with post-silicon validation team to resolve silicon level sightings and drive any paradigm shifts needed in design execution including FPGA development flow and process. • Provide technical guidance to junior engineers. Qualifications: • Bachelor of Science degree or Master of Science degree in Electrical/Electronic Engineering, Computer Engineering or Computer Science. • At least 10 years of experience in designing FPGAs, SoCs or IP blocks. • In depth knowledge of RTL language such as System Verilog, Verilog or VHDL. • In depth knowledge of industry standard tools and methods such as Synopsys VCS, Mentor/Siemens Questasim, Cadence Xcelium, etc. • Excellent technical leadership skills, and a proven ability to work with dynamic schedules Preferred Qualifications: • Knowledge of 5G (O-RAN, eCPRI, Front-Haul Compression, JESD) protocols and usage models. • Knowledge of object-oriented programming in TCL, Java, Python, or some other languages. • Behavioral traits including but not limited to strong communication skills (written and verbal), tolerance of ambiguity, problem solving, teamwork, attention to detail, commitment to task, and quality focus. • Experience with FPGA SW development platform especially on Altera Quartus Pro. • Experience in system interconnect bus such as AXI, AHB, AVMM, etc. • Knowledge in Agile development and familiar with Scrum process.