NOC Lead Design Engineer

Job Description

In Q4 2023, Intel announced PSG will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.

• Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.
• Participates in the definition of architecture and microarchitecture features of the block being designed.
• Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Follows secure development practices to address the security threat model and security objects within the design.
• Works with IP providers to integrate and validate IPs at the SoC level.
• Drives quality assurance compliance for smooth IPSoC handoff.
  
  

Qualifications

• Bachelors degree in Electrical/Computer Engineering or related field and 7+ years of experience Or a Masters degree in Electrical/Computer Engineering or related field and 6+ years of experience.
• 5+ years of RTL coding and/or IP integration experience using Verilog/SystemVerilog.
• 2+ years prior experience in addressing LINT, CDC and Static Timing Analysis issues.
• 2+ years prior experience with Power UPF.
• 1+ years prior experience as IP design engineer or SOC integration engineer interfacing with IP design teams.
• 1+ year prior experience in SOC micro-architecture (clocking, reset, power, etc) in terms block diagrams, data flow diagram, algorithm state machine, finite state machines, and detailed timing charts.
  
  

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change...