Platform Validation Engineer

Responsibility -Creates, defines and develops system validation environment and test suites. -Applies emulation and platform level tools and techniques to ensure performance to spec. -Responsible for the development of methodologies, execution of validation plans, and debug of failures. -Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features. Qualifications -Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering, with at least 7 years of relevant working experience. -Knowledge of the Intel architecture platforms and FPGA/emulation/Simics flows. -Experience in design, verification, power & performance measurement, validation disciplines, system/platform level debug and root cause isolation, methodology and tools. -Knowledge of different OS architecture and application implementation in Linux, Windows, RTOS, SW stacks and familiarity with scripting. -Experience working with customers and customer requirements. -Good stakeholder management skills, ability to handle ambiguity and ramp quickly and strong team player.