SOC Design Engineer

Job Responsibilities • Hardware architecture end-to-end lifecycle ownership. • Drive Architecture/Software/Hardware co-design and collaboration on features set. • Perform feasibility analysis including SoC area, performance and power estimates. • Guide an efficient system/hardware/software architecture to meet product requirements. • Assess and guide system integration feasibility, feature and implementation trade-offs of new technologies. • Review, challenge and influence roadmaps, and set technology intercept targets for future SoCs. • Recognize and understand technology trends. • Specification ownership/authoring for the High-level architecture spec or key SoC features. • Hardware specification authoring, review, and System C model development (where applicable). • Review downstream specifications and verification plans in ASIC, software and/or platform to ensure requirements are followed. • Architectural validation plan and execution. • Post-Silicon production support with silicon debug and publishing of customer documentation. • Industry standards tracking & 3rd party IP technical evaluation. • Patenting novel parts of system architecture. Qualifications • Possess a Bachelor's, a Master's degree or a Ph.D. in Electronics Engineering, Computer Engineering, or equivalent • Have meaningful industry expertise in SoC architecture definition - Clocks, Resets, Automotive safety, Interconnects, Memory Controller, Boot, Virtualization, Power Management, Security, System Performance, IO technologies, (PCIE, Camera Interfaces, etc), Multimedia accelerator pipelines, CPU/GPU coherency, Platform integration. • Must have outstanding SoC and system architecture fundamentals backed with substantial experience. This means a good understanding of power and performance tradeoffs, transient and steady-state performance states, idle and dynamic power states, as well as how SoC data and control flows interact. • Sound understanding of Microprocessor Subsystems, Memory Controllers and Communication Fabrics. • Good understanding the Digital ASIC Flow and Debug methodology. • Solid understanding of electrical and thermal considerations at the chip, package and system levels. • Good understanding of hardware-software interfaces. • Demonstrate and comfortable communicating and solving issues at all levels of architecture definition from micro-architecture to system level to software architecture. • Excellent communication skills across organizations and at the executive level. Excellent written skills for clear and concise reporting. • Excellent organization skills to prioritize conflicting requirements, and strong cross-site teamwork skills with the willingness to work independently. • Application of Machine Learning/ Artificial Intelligence in SOC design and flows across all functions • SOC design and bridge the gap between verification, emulation and bring up/validation • Shift left methodology HW/SW/FW co-verification/emulation Methodology